Job Title: Technical Marketing Manager - DDR Memory Products
Position Type: Full-Time
Location: Santa Clara, CA | RTO 5 Days Required
Salary Range / Rate: $150k-$250k + Bonus + Stock Option
Contact: Gilbert.zhang@intelliprogroup.com
Industry Engagement & JEDEC Leadership
- Represent Silergy as the primary technical contact in the JEDEC community, actively participating in meetings and working groups.
- Leverage industry network to influence standards, ensuring our DDR memory and PMIC products align with market trends and customer needs.
Customer & Partner Collaboration
- Serve as the primary liaison for global customers, including those in Korea, North America, and Asia-Pacific.
- Maintain strong working relationships with major CPU/SoC ecosystem partners, DIMM module manufacturers,
OEMs, and supply chain stakeholders.
- Coordinate closely with domestic R&D; teams in China and other global engineering centers to align customer requirements with product development.
Market Development & Strategic Planning
- Identify and pursue new business opportunities in the DDR memory and DDR PMIC markets.
- Define and execute product line strategies and roadmaps, incorporating customer feedback, competitive analysis, and market trends.
- Work closely with upstream and downstream supply chain partners to ensure timely product delivery and smooth commercialization.
Technical Marketing
- Lead technical marketing efforts, including preparing product collateral, application notes, competitive positioning documents, and white papers.
- Deliver technical training and presentations to customers, partners, and internal teams.
- Support key customer design-in activities, from concept to mass production.
Travel
- Travel domestically and internationally to customer sites, industry events, JEDEC meetings, and offices as required.
Qualifications
- Experience & Industry Network: 5+ years of active JEDEC participation with strong professional connections.
- Proven track record in technical marketing, product management, or FAE roles within DDR memory, DDR PMIC, or related semiconductor products.
- Technical Expertise: Strong knowledge of DDR memory architecture, DDR PMIC, and DDR-related timing solutions; solid understanding of analog IC fundamentals, including voltage regulation (Buck, LDO), power sequencing, and signal integrity.
- Communication & Collaboration: Excellent interpersonal skills for engaging with global customers and cross-functional teams. Skilled at working with diverse cultural and regional business environments.
-Education: Bachelor’s degree in Electrical Engineering (BSEE) required; Master’s degree (MSEE) or higher preferred.
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